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tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 1 the lumenology company copyright 2008, taos inc. www.taosinc.com approximates human eye response approximately 4 more sensitive than tsl2560/61 device programmable interrupt function with user-defined upper and lower threshold settings 16-bit digital output with smbus (tsl2568) at 100 khz or i 2 c (TSL2569) fast-mode at 400 khz programmable analog gain and integration time supporting 1,000,000-to-1 dynamic range available in ultra-small 1.25 mm 1.75 mm chipscale package automatically rejects 50/60-hz lighting ripple low active power (0.75 mw typical) with power down mode rohs compliant description the tsl2568 and TSL2569 are high-sensitivity light-to-digital converters that transform light intensity to a digital signal output capable of direct i 2 c (TSL2569) or smbus (tsl2568) interface. each device combines one broadband photodiode (visible plus infrared) and one infrared-responding photodiode on a single cmos integrated circuit capable of providing a near-photopic response over an effective 20-bit dynamic range (16-bit resolution). two integrating adcs convert the photodiode currents to a digital output that represents the irradiance measured on each channel. this digital output can be input to a microprocessor where illuminance (ambient light level) in lux is derived using an empirical formula to approximate the human eye response. the tsl2568 device permits an smb-alert style interrupt, and the TSL2569 device supports a traditional level style interrupt that remains asserted until the firmware clears it. while useful for general purpose light sensing applications, the tsl2568/69 devices are designed particularly for display panels (lcd, oled, etc.) with the purpose of extending battery life and providing optimum viewing in diverse lighting conditions. display panel backlighting, which can account for up to 30 to 40 percent of total platform power, can be automatically managed. both devices are also ideal for controlling keyboard illumination based upon ambient lighting conditions. illuminance information can further be used to manage exposure control in digital cameras. the tsl2568/69 devices are ideal in notebook/tablet pcs, lcd monitors, flat-panel televisions, cell phones, and digital cameras. in addition, other applications include street light control, security lighting, sunlight harvesting, machine vision, and automotive instrumentation clusters. texas advanced optoelectronic solutions inc. 1001 klein road suite 300 plano, tx 75074 (972) 673-0759 6 sda 5 int 4 scl package t 6-lead tmb (top view) v dd 1 addr sel 2 gnd 3 package cs 6-lead chipscale (top view) v dd 1 addr sel 2 gnd 3 6 sda 5 int 4 scl package drawings a re not to scale ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 2 copyright 2008, taos inc. the lumenology company www.taosinc.com functional block diagram two-wire serial interface address select interrupt sda v dd = 2.7 v to 3.5 v channel 0 visible and ir channel 1 ir only command register adc register int scl addr sel integrating a/d converter detailed description the tsl2568 and TSL2569 are second-generation ambient light sensor devices. each contains two integrating analog-to-digital converters (adc) that integrate currents from two photodiodes. integration of both channels occurs simultaneously. upon completion of the conversion cycle, the conversion result is transferred to the channel 0 and channel 1 data registers, respectively. the transfers are double-buffered to ensure that the integrity of the data is maintained. after the transfer, the device automatically begins the next integration cycle. communication to the device is accomplished through a standard, two-wire smbus or i 2 c serial bus. consequently, the tsl256x device can be easily connected to a microcontroller or embedded controller. no external circuitry is required for signal conditioning, thereby saving pcb real estate as well. since the output of the tsl256x device is digital, the output is effectively immune to noise when compared to an analog signal. the tsl256x devices also support an interrupt feature that simplifies and improves system efficiency by eliminating the need to poll a sensor for a light intensity value. the primary purpose of the interrupt function is to detect a meaningful change in light intensity. the concept of a meaningful change can be defined by the user both in terms of light intensity and time, or persistence, of that change in intensity. the tsl256x devices have the ability to define a threshold above and below the current light level. an interrupt is generated when the value of a conversion exceeds either of these limits. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 3 the lumenology company copyright 2008, taos inc. www.taosinc.com terminal functions terminal name t pkg no. type description addr sel 2 i smbus device select ? three-state gnd 3 power supply ground. all voltages are referenced to gnd. int 5 o level or smb alert interrupt ? open drain. scl 4 i smbus serial clock input terminal ? clock signal for smbus serial data. sda 6 i/o smbus serial data i/o terminal ? serial data i/o for smbus. v dd 1 supply voltage. available options device interface package ? leads package designator ordering number tsl2568 smbus chipscale cs tsl2568cs tsl2568 smbus tmb-6 t tsl2568t TSL2569 i 2 c chipscale cs TSL2569cs TSL2569 i 2 c tmb-6 t TSL2569t absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage, v dd (see note 1) 3.8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital output voltage range, v o ?0.5 v to 3.8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital output current, i o ?1 ma to 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?40 c to 85 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . esd tolerance, human body model 2000 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditions? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: all voltages are with respect to gnd. recommended operating conditions min nom max unit supply voltage, v dd 2.7 3 3.6 v operating free-air temperature, t a ?30 70 c scl, sda input low voltage, v il ?0.5 0.8 v scl, sda input high voltage, v ih 2.1 3.6 v electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions min typ max unit i supply current active 0.24 0.6 ma i dd supply current power down 3.2 15 a v ol int, sda output low voltage 3 ma sink current 0 0.4 v i leak leakage current ?5 5 a ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 4 copyright 2008, taos inc. the lumenology company www.taosinc.com operating characteristics, high gain (16 ), v dd = 3 v, t a = 25 c, (unless otherwise noted) (see notes 2, 3, 4, 5) parameter test conditions channel tsl2568t, TSL2569t tsl2568cs, TSL2569cs unit parameter test conditions channel min typ max min typ max unit f osc oscillator frequency 690 735 780 690 735 780 khz dark adc count value e 0t 402 ms ch0 0 8 0 8 counts dark adc count value e e = 0, t int = 402 ms ch1 0 8 0 8 counts t 178 ms ch0 65535 65535 t int > 178 ms ch1 65535 65535 full scale adc count t 101 ms ch0 37177 37177 counts full scale adc count value (note 6) t int = 101 ms ch1 37177 37177 counts t 13 7 ms ch0 5047 5047 t int = 13.7 ms ch1 5047 5047 p = 640 nm, t in t = 101 ms ch0 3000 4000 5000 p = 640 nm , t int = 101 ms e e = 33 w/cm 2 ch1 1000 counts p = 940 nm, t in t = 101 ms ch0 2800 4000 5200 counts adc count value p = 940 nm , t int = 101 ms e e = 106 w/cm 2 ch1 3520 adc count value p = 640 nm, t in t = 101 ms ch0 3000 4000 5000 p = 640 nm , t int = 101 ms e e = 34.5 w/cm 2 ch1 840 counts p = 940 nm, t in t = 101 ms ch0 2800 4000 5200 counts p = 940 nm , t int = 101 ms e e = 110.9 w/cm 2 ch1 3440 adc t l ti 640 nm t 101 ms 018 025 032 014 021 028 adc count value ratio: p = 640 nm, t int = 101 ms 0.18 0.25 0.32 0.14 0.21 0.28 adc count value ratio: ch1/ch0 940 nm t 101 ms 073 088 103 070 086 101 ch1/ch0 p = 940 nm, t int = 101 ms 0.73 0.88 1.03 0.70 0.86 1.01 640 nm t 101 ms ch0 121 116 r irradiance responsivity p = 640 nm, t int = 101 ms ch1 30.3 24 counts/ ( w/ r e irradiance responsivity 940 nm t 101 ms ch0 37.7 36 ( w/ c m 2 ) p = 940 nm, t int = 101 ms ch1 33.2 31 cm 2 ) fluorescent li g ht source: ch0 185 180 r illuminance responsivity fluorescent light source: t int = 402 ms ch1 35 33.3 counts/ r v illuminance responsivity incandescent li g ht source: ch0 599 537 counts/ lux incandescent light source: t int = 402 ms ch1 330 307 adc count value ratio: fluorescent light source: t int = 402 ms 0.19 0.19 adc count value ratio: ch1/ch0 incandescent li g ht source: 055 057 ch1/ch0 incandescent light source: t int = 402 ms 0.55 0.57 fluorescent li g ht source: ch0 11.6 11.1 r illuminance responsivit y , fluorescent light source: t int = 402 ms ch1 2.2 2.1 counts/ r v illuminance responsivity , low gain mode (note 7) incandescent li g ht source: ch0 37.5 33.8 counts/ lux incandescent light source: t int = 402 ms ch1 20.7 19.3 (sensor lux) / (actual lux) high gain fluorescent light source: t int = 402 ms 0.65 1 1.35 0.65 1 1.35 (actual lux), high gain mode (note 8) incandescent light source: t int = 402 ms 0.60 1 1.40 0.60 1 1.40 ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 5 the lumenology company copyright 2008, taos inc. www.taosinc.com notes: 2. optical measurements are made using small-angle incident radiation from light-emitting diode optical sources. visible 640 nm leds and infrared 940 nm leds are used for final product testing for compatibility with high-volume production. 3. the 640 nm irradiance e e is supplied by an ali ngap light-emitting diode with the following characteristics: peak wavelength p = 640 nm and spectral halfwidth ? = 17 nm. 4. the 940 nm irradiance e e is supplied by a gaas light-emitting diode with the following characteristics: peak wavelength p = 940 nm and spectral halfwidth ? = 40 nm. 5. integration time t int , is dependent on internal oscillator frequency (f osc ) and on the integration field value in the timing register as described in the register set section. for nominal f osc = 735 khz, nominal t int = (number of clock cycles)/f osc . field value 00: t int = (11 918)/f osc = 13.7 ms field value 01: t int = (81 918)/f osc = 101 ms field value 10: t int = (322 918)/f osc = 402 ms scaling between integration times vary proportionally as follows: 11/322 = 0.034 (field value 00), 81/322 = 0.252 (field value 01), and 322/322 = 1 (field value 10). 6. full scale adc count value is limited by the fact that there is a maximum of one count per two oscillator frequency periods and also by a 2-count offset. full scale adc count value = ((number of clock cycles)/2 ? 2) field value 00: full scale adc count value = ((11 918)/2 ? 2) = 5047 field value 01: full scale adc count value = ((81 918)/2 ? 2) = 37177 field value 10: full scale adc count value = 65535, which is limited by 16 bit register. this full scale adc count value is re ached for 131074 clock cycles, which occurs for t int = 178 ms for nominal f osc = 735 khz. 7. low gain mode has 16 lower gain than high gain mode: (1/16 = 0.0625). 8. the sensor lux is calculated using the empirical formula shown on p. 22 of this data sheet based on measured ch0 and ch1 adc count values for the light source specified. actual lux is obtained with a commercial luxmeter. the range of the (sensor lux) / (actual lux) ratio is estimated based on the variation of the 640 nm and 940 nm optical parameters. devices are not 100% tested with fluorescent or incandescent light sources. ac electrical characteristics, v dd = 3 v, t a = 25 c (unless otherwise noted) parameter ? test conditions min typ max unit t (conv) conversion time 12 100 400 ms f clock frequency (i 2 c only) 0 400 khz f (scl) clock frequency (smbus only) 10 100 khz t (buf) bus free time between start and stop condition 1.3 s t (hdsta) hold time after (repeated) start condition. after this period, the first clock is generated. 0.6 s t (susta) repeated start condition setup time 0.6 s t (susto) stop condition setup time 0.6 s t (hddat) data hold time 0 0.9 s t (sudat) data setup time 100 ns t (low) scl clock low period 1.3 s t (high) scl clock high period 0.6 s t (timeout) detect clock/data low timeout (smbus only) 25 35 ms t f clock/data fall time 300 ns t r clock/data rise time 300 ns c i input pin capacitance 10 pf ? specified by design and characterization; not production tested. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 6 copyright 2008, taos inc. the lumenology company www.taosinc.com parameter measurement information sda scl stop start scl ack t (lowmext) t (lowmext) t (lowsext) scl ack t (lowmext) start condition stop condition p sda t (susto) t (sudat) t (hddat) t (buf) v ih v il scl t (susta) t (high) t (f) t (r) t (hdsta) t (low) v ih v il ps s figure 1. timing diagrams a0a1a2a3a4a5a6 scl start by master sda 19 19 d1d2d3d4d5d6d7 d0 r/w frame 1 smbus slave address byte frame 2 command byte ack by tsl256x stop by master ack by tsl256x figure 2. example timing diagram for smbus send byte format a0a1a2a3a4a5a6 scl start by master sda 19 19 d1d2d3d4d5d6d7 d0 r/w frame 1 smbus slave address byte frame 2 data byte from tsl256x ack by tsl256x stop by master nack by master figure 3. example timing diagram for smbus receive byte format ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 7 the lumenology company copyright 2008, taos inc. www.taosinc.com typical characteristics figure 4 spectral responsivity ? wavelength ? nm 0 400 0.2 0.4 0.6 0.8 1 500 600 700 800 900 1000 1100 normalized responsivity 300 channel 1 photodiode channel 0 photodiode figure 5 normalized responsivity vs. angular displacement ? cs package ? angular displacement ? normalized responsivity 0 0.2 0.4 0.6 0.8 1.0 ?90 ?60 ?30 0 30 60 90 optical axis figure 6 normalized responsivity vs. angular displacement ? tmb package ? angular displacement ? normalized responsivity 0 0.2 0.4 0.6 0.8 1.0 ?90 ?60 ?30 0 30 60 90 optical axis ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 8 copyright 2008, taos inc. the lumenology company www.taosinc.com principles of operation analog-to-digital converter the tsl256x contains two integrating analog-to-digital converters (adc) that integrate the currents from the channel 0 and channel 1 photodiodes. integration of both channels occurs simultaneously , and upon completion of the conversion cycle the conversion result is transferred to the channel 0 and channel 1 data registers, respectively. the transfers are double buffered to ensure that invalid data is not read during the transfer. after the transfer, the device automatically begins the next integration cycle. digital interface interface and control of the tsl256x is accomplished through a two-wire serial interface to a set of registers that provide access to device control functions and output data. the serial interface is compatible with system management bus (smbus) versions 1.1 and 2.0, and i 2 c bus fast-mode. the tsl256x offers three slave addresses that are selectable via an external pin (addr sel). the slave address options are shown in t able 1. table 1. slave address selection addr sel terminal level slave address smb alert address gnd 0101001 0001100 float 0111001 0001100 vdd 1001001 0001100 note: the slave and smb alert addresses are 7 bits. please note the smbus and i 2 c protocols on pages 9 through 12. a read/write bit should be appended to the slave address by the master device to properly communicate with the tsl256x device. smbus and i 2 c protocols each send and write protocol is, essentially, a series of bytes. a byte sent to the tsl256x with the most significant bit (msb) equal to 1 will be interpreted as a command byte. the lower four bits of the command byte form the register select address (see table 2), which is used to select the destination for the subsequent byte(s) received. the tsl256x responds to any receive byte requests with the contents of the register specified by the stored register select address. the tsl256x implements the following protocols of the smb 2.0 specification: send byte protocol receive byte protocol write byte protocol write word protocol read word protocol block write protocol block read protocol the tsl256x implements the following protocols of the philips semiconductor i 2 c specification: i 2 c write protocol i 2 c read (combined format) protocol ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 9 the lumenology company copyright 2008, taos inc. www.taosinc.com when an smbus block write or block read is initiated (see description of command register), the byte following the command byte is ignored but is a requirement of the smbus specification. this field contains the byte count (i.e. the number of bytes to be transferred). the tsl2568 (smbus) device ignores this field and extracts this information by counting the actual number of bytes transferred before the stop condition is detected. when an i 2 c write or i 2 c read (combined format) is initiated, the byte count is also ignored but follows the smbus protocol specification. data bytes continue to be transferred from the TSL2569 (i 2 c) device to master until a nack is sent by the master. the data formats supported by the tsl2568 and TSL2569 devices are: master transmitter transmits to slave receiver (smbus and i 2 c): ? the transfer direction in this case is not changed. master reads slave immediately after the first byte (smbus only): ? at the moment of the first acknowledgment (provided by the slave receiver) the master transmitter becomes a master receiver and the slave receiver becomes a slave transmitter. combined format (smbus and i 2 c): ? during a change of direction within a transfer, the master repeats both a start condition and the slave address but with the r/w bit reversed. in this case, the master receiver terminates the transfer by generating a nack on the last byte of the transfer and a stop condition. for a complete description of smbus protocols, please review the smbus specification at http://www.smbus.org/specs. for a comple te description of i 2 c protocols, please review the i 2 c specification at http://www .semiconductors.philips.com. wr 7 data byte slave address s 1 ap a 8 11 11 xx a acknowledge (this bit position may be 0 for an ack or 1 for a nack) p stop condition rd read (bit value of 1) s start condition sr repeated start condition wr write (bit value of 0) x shown under a field indicates that that field is required to have a value of x ... continuation of protocol master-to-slave slave-to-master figure 7. smbus and i 2 c packet protocol element key ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 10 copyright 2008, taos inc. the lumenology company www.taosinc.com wr 7 data byte slave address s 1 ap a 8 11 11 figure 8. smbus send byte protocol rd 7 data byte slave address s 1 ap a 8 11 11 1 figure 9. smbus receive byte protocol wr 7 data byte slave address s 1 aa a 8 11 1 8 command code 1 p 1 figure 10. smbus write byte protocol wr 7 data byte low slave address s 1 a a 8 11 1 command code 1 p 8 11 rd slave address s a a 7 1 1 1 figure 11. smbus read byte protocol wr 7 data byte low slave address s 1 aa a 8 11 1 8 command code 1 p data byte high a 811 figure 12. smbus write word protocol wr 7 data byte low slave address s 1 a a 8 11 1 command code 1 p data byte high a 8 11 rd slave address s a a ... 7 1 811 1 figure 13. smbus read word protocol ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 11 the lumenology company copyright 2008, taos inc. www.taosinc.com wr 8 data byte 1 slave address s 1 a a 8 11 1 command code p data byte n a 8 11 byte count = n a a ... 7 811 data byte 2 a 81 ... figure 14. smbus block write or i 2 c write protocols note: the i 2 c write protocol does not use the byte count packet, and the master will continue sending data bytes until the master initiates a stop condition. see the command register on page 13 for additional information regarding the block read/write protocol. wr 7 byte count = n slave address s 1 a a 8 11 1 command code p data byte n a 8 11 slave address a a ... 7 811 data byte 2 a 81 ... data byte 1 a 81 1 sr 1 rd 1 figure 15. smbus block read or i 2 c read (combined format) protocols note: the i 2 c read protocol does not use the byte count packet, and the master will continue receiving data bytes until the master initiates a stop condition. see the command register on page 13 for additional information regarding the block read/write protocol. register set the tsl256x is controlled and monitored by sixteen registers (three are reserved) and a command register accessed through the serial interface. these registers provide for a variety of control functions and can be read to determine results of the adc conversions. the register set is summarized in table 2. table 2. register address address resister name register function ?? command specifies register address 0h control control of basic functions 1h timing integration time/gain control 2h threshlowlow low byte of low interrupt threshold 3h threshlowhigh high byte of low interrupt threshold 4h threshhighlow low byte of high interrupt threshold 5h threshhighhigh high byte of high interrupt threshold 6h interrupt interrupt control 7h ?? reserved 8h crc factory test ? not a user register 9h ?? reserved ah id part number/ rev id bh ?? reserved ch data0low low byte of adc channel 0 dh data0high high byte of adc channel 0 eh data1low low byte of adc channel 1 fh data1high high byte of adc channel 1 the mechanics of accessing a specific register depends on the specific smb protocol used. refer to the section on smbus protocols. in general, the command register is written first to specify the specific control/status register for following read/write operations. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 12 copyright 2008, taos inc. the lumenology company www.taosinc.com command register the command register specifies the address of the target register for subsequent read and write operations. the send byte protocol is used to configure the command register. the command register contains eight bits as described in table 3. the command register defaults to 00h at power on. table 3. command register 6 754 address 2 310 0 000 0 000 reset value: command clear cmd word block field bit description cmd 7 select command register. must write as 1. clear 6 interrupt clear. clears any pending interrupt. this bit is a write-one-to-clear bit. it is self clearing. word 5 smb write/read word protocol. 1 indicates that this smb transaction is using either the smb write word or read word protocol. block 4 block write/read protocol. 1 indicates that this transaction is using either the block write or the block read protocol. see note below. address 3:0 register address. this field selects the specific control or status register for following write and read commands according to table 2. note: an i 2 c block transaction will continue until the master sends a stop condition. see figure 14 and figure 15. unlike the i 2 c protocol, the smbus read/write protocol requires a byte count. all four adc channel data registers (ch through fh) can be read simultaneousl y in a single smbus transaction. this is the only 32-bit data block supported by the tsl2568 smbus protocol. the block bit must be set to 1, and a read condition should be initiated with a command code of 9bh. by using a command code of 9bh during an smbus block read protocol, the tsl2568 device will automatically insert the appropriate byte count (byte count = 4) as illustrated in figure 15. a write condition should not be used in conjunction with the bh register. control register (0h) the control register contains two bits and is primarily used to power the tsl256x device up and down as shown in table 4. table 4. control register 6 754 power 2 310 0 000 0 000 reset value: control resv resv resv resv resv resv 0h field bit description resv 7:2 reserved. write as 0. power 1:0 power up/power down. by writing a 03h to this register, the device is powered up. by writing a 00h to this register, the device is powered down. note: if a value of 03h is written, the value returned during a read cycle will be 03h. this feature can be used to verify that the device is communicating properly. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 13 the lumenology company copyright 2008, taos inc. www.taosinc.com timing register (1h) the timing register controls both the integration time and the gain of the adc channels. a common set of control bits is provided that controls both adc channels. the timing register defaults to 02h at power on. table 5. timing register 6 754 integ 2 310 0 000 0 010 reset value: timing manual resv resv gain resv resv 1h field bit description resv 7?5 reserved. write as 0. gain 4 switches gain between low gain and high gain modes. writing a 0 selects low gain (1 ) ; writing a 1 selects high gain (16 ). manual 3 manual timing control. writing a 1 begins an integration cycle. writing a 0 stops an integration cycle. note: this field only has meaning when integ = 11. it is ignored at all other times. resv 2 reserved. write as 0. integ 1:0 integrate time. this field selects the integration time for each conversion. integration time is dependent on the integ field v alue and the internal clock frequency. nominal integration times and respective scaling between integration times scale proportionally as shown in table 6. see note 5 and note 6 on page 5 for detailed information regarding how the scale values were obtained; see page 22 for further information on how to calculate lux. table 6. integration time integ field value scale nominal integration time 00 0.034 13.7 ms 01 0.252 101 ms 10 1 402 ms 11 ?? n/a the manual timing control feature is used to manually start and stop the integration time period. if a particular integration time period is required that is not listed in table 6, then this feature can be used. for example, the manual timing control can be used to synchronize the tsl256x device with an ext ernal light source (e.g. led). a start command to begin integration can be initiated by writing a 1 to this bit field. correspondingly, the integration can be stopped by simpl y writing a 0 to the same bit field. interrupt threshold register (2h ? 5h) the interrupt threshold registers store the values to be used as the high and low trigger points for the comparison function for interrupt generation. if the value generated by channel 0 crosses below or is equal to the low threshold specified, an interrupt is asserted on the interrupt pin. if the value generated by channel 0 crosses above the high threshold specified, an interrupt is asserted on the interrupt pin. registers threshlowlow and threshlowhigh provide the low byte and high byte, respectively, of the lower interrupt threshold. registers threshhighlow and threshhighhigh provide the low and high bytes, respectively, of the upper interrupt threshold. the high and low bytes from each set of registers are combined to form a 16-bit threshold value. the interrupt threshold registers default to 00h on power up. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 14 copyright 2008, taos inc. the lumenology company www.taosinc.com table 7. interrupt threshold register register address bits description threshlowlow 2h 7:0 adc channel 0 lower byte of the low threshold threshlowhigh 3h 7:0 adc channel 0 upper byte of the low threshold threshhighlow 4h 7:0 adc channel 0 lower byte of the high threshold threshhighhigh 5h 7:0 adc channel 0 upper byte of the high threshold note: since two 8-bit values are combined for a single 16-bit value for each of the high and low interrupt thresholds, the send byte protocol should not be used to write to these registers. any values transferred by the send byte protocol with the msb set would be interpreted as the command field and stored as an address for subsequent read/write operations and not as the interrupt threshold information as desired. the write word protocol should be used to write byte-paired registers. for example, the threshlowlow and threshlowhigh registers (as well as the threshhighlow and threshhighhigh registers) can be written together to set the 16-bit adc value in a single transaction. interrupt control register (6h) the interrupt register controls the extensive interrupt capabilities of the tsl256x. the tsl256x permits both smb-alert style interrupts as well as traditional level-style interrupts. the interrupt persist bit field (persist) provides control over when interrupts occur. a value of 0 causes an interrupt to occur after every integration cycle regardless of the threshold settings. a value of 1 results in an interrupt after one integration time period outside the threshold window. a value of n (where n is 2 through15) results in an interrupt only if the value remains outside the threshold window for n consecutive integration cycles. for example, if n is equal to 10 and the integration time is 402 ms, then the total time is approximately 4 seconds. when a level interrupt is selected, an interrupt is generated whenever the last conversion results in a value outside of the programmed threshold window. the interrupt is active-low and remains asserted until cleared by writing the command register with the clear bit set. in smbalert mode, the interrupt is similar to the traditional level style and the interrupt line is asserted low. to clear the interrupt, the host responds to the smbalert by performing a modified receive byte operation, in which the alert response address (ara) is placed in the slave address field, and the tsl256x that generated the interrupt responds by returning its own address in the seven most significant bits of the receive data byte. if more than one device connected on the bus has pulled the smbalert line low, the highest priority (lowest address) device will win communication rights via standard arbitration during the slave address transfer. if the device loses this arbitration, the interrupt will not be cleared. the alert response address is 0ch. when intr = 11, the interrupt is generated immediately following the smbus write operation. operation then behaves in an smbalert mode, and the software set interrupt may be cleared by an smbalert cycle. note: interrupts are based on the value of channel 0 only. table 8. interrupt control register 6 754 persist 2 310 0 000 0 000 reset value: interrupt resv resv intr 6h field bits description resv 7:6 reserved. write as 0. intr 5:4 intr control select. this field determines mode of interrupt logic according to table 9, below. persist 3:0 interrupt persistence. controls rate of interrupts to the host processor as shown in table 10, below. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 15 the lumenology company copyright 2008, taos inc. www.taosinc.com table 9. interrupt control select intr field value read value 00 interrupt output disabled 01 level interrupt 10 smbalert compliant 11 test mode: sets interrupt and functions as mode 10 note: field value of 11 may be used to test interrupt connectivity in a system or to assist in debugging interrupt service routine software. table 10. interrupt persistence select persist field value interrupt persist function 0000 every adc cycle generates interrupt 0001 any value outside of threshold range 0010 2 integration time periods out of range 0011 3 integration time periods out of range 0100 4 integration time periods out of range 0101 5 integration time periods out of range 0110 6 integration time periods out of range 0111 7 integration time periods out of range 1000 8 integration time periods out of range 1001 9 integration time periods out of range 1010 10 integration time periods out of range 1011 11 integration time periods out of range 1100 12 integration time periods out of range 1101 13 integration time periods out of range 1110 14 integration time periods out of range 1111 15 integration time periods out of range id register (ah) the id register provides the value for both the part number and silicon revision number for that part number. it is a read-only register, whose value never changes. table 11. id register 6 754 revno 2 310 ? ??? ? ??? reset value: id partno ah field bits description partno 7:4 part number identification: field value 1010 = tsl2568, field value 1011 = TSL2569 revno 3:0 revision number identification ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 16 copyright 2008, taos inc. the lumenology company www.taosinc.com adc channel data registers (ch ? fh) the adc channel data are expressed as 16-bit values spread across two registers. the adc channel 0 data registers, data0low and data0high provide the lower and upper bytes, respectively, of the adc value of channel 0. registers data1low and da ta1high provide the lower and upper bytes, respectively, of the adc value of channel 1. all channel data registers are read-only and default to 00h on power up. table 12. adc channel data registers register address bits description data0low ch 7:0 adc channel 0 lower byte data0high dh 7:0 adc channel 0 upper byte data1low eh 7:0 adc channel 1 lower byte data1high fh 7:0 adc channel 1 upper byte the upper byte data registers can only be read following a read to the corresponding lower byte register. when the lower byte register is read, the upper eight bits are strobed into a shadow register, which is read by a subsequent read to the upper byte. the upper register will read the correct value even if additional adc integration cycles end between the reading of the lower and upper registers. note: the read w ord protocol can be used to read byte-paired registers. for example, the data0low and data0high registers (as well as the data1low and data1high registers) may be read together to obtain the 16-bit adc value in a single transaction ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 17 the lumenology company copyright 2008, taos inc. www.taosinc.com application information: software basic operation after applying v dd , the device will initially be in the power-down state. to operate the device, issue a command to access the control register followed by the data value 03h to power up the device. at this point, both adc channels will begin a conversion at the default integration time of 400 ms. after 400 ms, the conversion results will be available in the data0 and data1 registers. use the following pseudo code to read the data registers: // read adc channels using read word protocol ? recommended address = 0x39 //slave addr ? also 0x29 or 0x49 //address the ch0 lower data register and configure for read word command = 0xac //set command bit and word bit //reads two bytes from sequential registers 0x0c and 0x0d //results are returned in datalow and datahigh variables readword (address, command, datalow, datahigh) channel0 = 256 * datahigh + datalow //address the ch1 lower data register and configure for read word command = 0xae //set bit fields 7 and 5 //reads two bytes from sequential registers 0x0e and 0x0f //results are returned in datalow and datahigh variables readword (address, command, datalow, datahigh) channel1 = 256 * datahigh + datalow //shift datahigh to upper byte // read adc channels using read byte protocol address = 0x39 //slave addr ? also 0x29 or 0x49 command = 0x8c //address the ch0 lower data register readbyte (address, command, datalow) //result returned in datalow command = 0x8d //address the ch0 upper data register readbyte (address, command, datahigh) //result returned in datahigh channel0 = 256 * datahigh + datalow //shift datahigh to upper byte command = 0x8e //address the ch1 lower data register readbyte (address, command, datalow) //result returned in datalow command = 0x8f //address the ch1 upper data register readbyte (address, command, datahigh) //result returned in datahigh channel1 = 256 * datahigh + datalow //shift datahigh to upper byte ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 18 copyright 2008, taos inc. the lumenology company www.taosinc.com application information: software configuring the timing register the command, timing, and control registers are initialized to default values on power up. setting these registers to the desired values would be part of a normal initialization or setup procedure. in addition, to maximize the performance of the device under various conditions, the integration time and gain may be changed often during operation. the following pseudo code illustrates a procedure for setting up the timing register for various options: // set up timing register //low gain (1x), integration time of 402ms (default value) address = 0x39 command = 0x81 data = 0x02 writebyte(address, command, data) //low gain (1x), integration time of 101ms data = 0x01 writebyte(address, command, data) //low gain (1x), integration time of 13.7ms data = 0x00 writebyte(address, command, data) //high gain (16x), integration time of 101ms data = 0x11 writebyte(address, command, data) //read data registers (see basic operation example) //perform manual integration //set up for manual integration with gain of 1x data = 0x03 //set manual integration mode ? device stops converting writebyte(address, command, data) //begin integration period data = 0x0b writebyte(address, command, data) //integrate for 50ms sleep (50) //wait for 50ms //stop integrating data = 0x03 writebyte(address, command, data) //read data registers (see basic operation example) ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 19 the lumenology company copyright 2008, taos inc. www.taosinc.com application information: software interrupts the interrupt feature of the tsl256x device simplifies and improves system efficiency by eliminating the need to poll the sensor for a light intensity value. interrupt styles are determined by the intr field in the interrupt register. the interrupt feature may be disabled by writing a field value of 00h to the interrupt control register so that polling can be performed. the versatility of the interrupt feature provides many options for interrupt configuration and usage. the primary purpose of the interrupt function is to provide a meaningful change in light intensity. however, it also be used as an end-of-conversion signal. the concept of a meaningful change can be defined by the user both in terms of light intensity and time, or persistence, of that change in intensity. the tsl256x device implements two 16-bit-wide interrupt threshold registers that allow the user to define a threshold above and below the current light level. an interrupt will then be generated when the value of a conversion exceeds either of these limits. for simplicity of programming, the threshold comparison is accomplished only with channel 0. this simplifies calculation of thresholds that are based, for example, on a percent of the current light level. it is adequate to use only one channel when calculating light intensity differences since, for a given light source, the channel 0 and channel 1 values are linearly proportional to each other and thus both values scale linearly with light intensity. to further control when an interrupt occurs, the tsl256x device provides an interrupt persistence feature. this feature allows the user to specify a number of conversion cycles for which a light intensity exceeding either interrupt threshold must persist before actually generating an interrupt. this can be used to prevent transient changes in light intensity from generating an unwanted interrupt. with a value of 1, an interrupt occurs immediately whenever either threshold is exceeded. with values of n , where n can range from 2 to 15, n consecutive conversions must result in values outside the interrupt window for an interrupt to be generated. for example, if n is equal to 10 and the integration time is 402 ms, then an interrupt will not be generated unless the light level persists for more than 4 seconds outside the threshold. two different interrupt styles are available: level and smbus alert. the difference between these two interrupt styles is how they are cleared. both result in the interrupt line going active low and remaining low until the interrupt is cleared. a level style interrupt is cleared by setting the clear bit (bit 6) in the command register. the smbus alert style interrupt is cleared by an alert response as described in the interrupt control register section and smbus specification. to configure the interrupt as an end-of-conversion signal, the interrupt persist field is set to 0. either level or smbus alert style can be used. an interrupt will be generated upon completion of each conversion. the interrupt threshold registers are ignored. the following example illustrates the configuration of a level interrupt: // set up end?of?conversion interrupt, level style address = 0x39 //slave addr also 0x29 or 0x49 command = 0x86 //address interrupt register data = 0x10 //level style, every adc cycle writebyte(address, command, data) ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 20 copyright 2008, taos inc. the lumenology company www.taosinc.com application information: software the following example pseudo code illustrates the configuration of an smb alert style interrupt when the light intensity changes 20% from the current value, and persists for 3 conversion cycles: // read current light level address = 0x39 //slave addr also 0x29 or 0x49 command = 0xac //set command bit and word bit readword (address, command, datalow, datahigh) channel0 = (256 * datahigh) + datalow //calculate upper and lower thresholds t_upper = channel0 + (0.2 * channel0) t_lower = channel0 ? (0.2 * channel0) //write the lower threshold register command = 0xa2 //addr lower threshold reg, set word bit writeword (address, command, t_lower.lobyte, t_lower.hibyte) //write the upper threshold register command = 0xa4 //addr upper threshold reg, set word bit writeword (address, command, t_upper.lobyte, t_upper.hibyte) //enable interrupt command = 0x86 //address interrupt register data = 0x23 //smbalert style, persist = 3 writebyte(address, command, data) in order to generate an interrupt on demand during system test or debug, a test mode (intr = 11) can be used. the following example illustrates how to generate an interrupt on demand: // generate an interrupt address = 0x39 //slave addr also 0x29 or 0x49 command = 0x86 //address interrupt register data = 0x30 //test interrupt writebyte(address, command, data) //interrupt line should now be low ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 21 the lumenology company copyright 2008, taos inc. www.taosinc.com application information: software calculating lux the tsl256x is intended for use in ambient light detection applications such as display backlight control, where adjustments are made to display brightness or contrast based on the brightness of the ambient light, as perceived by the human eye. conventional silicon detectors respond strongly to infrared light, which the human eye does not see. this can lead to significant error when the infrared content of the ambient light is high, such as with incandescent lighting, due to the difference between the silicon detector response and the brightness perceived by the human eye. this problem is overcome in the tsl256x through the use of two photodiodes. one of the photodiodes (channel 0) is sensitive to both visible and infrared light, while the second photodiode (channel 1) is sensitive primarily to infrared light. an integrating adc converts the photodiode currents to digital outputs. channel 1 digital output is used to compensate for the effect of the infrared component of light on the channel 0 digital output. the adc digital outputs from the two channels are used in a formula to obtain a value that approximates the human eye response in the commonly used illuminance unit of lux: chipscale package for 0 < ch1/ch0 0.35 lux = 0.00713 ch0 ? 0.00975 ch1 for 0.35 < ch1/ch0 0.45 lux = 0.00813 ch0 ? 0.01250 ch1 for 0.45 < ch1/ch0 0.52 lux = 0.00935 ch0 ? 0.01521 ch1 for 0.52 < ch1/ch0 0.67 lux = 0.00394 ch0 ? 0.00482 ch1 for 0.67 < ch1/ch0 0.85 lux = 0.00337 ch0 ? 0.00396 ch1 for ch1/ch0 > 0.85 lux = 0 tmb package for 0 < ch1/ch0 0.35 lux = 0.00763 ch0 ? 0.01031 ch1 for 0.35 < ch1/ch0 0.50 lux = 0.00817 ch0 ? 0.01188 ch1 for 0.50 < ch1/ch0 0.60 lux = 0.00723 ch0 ? 0.01000 ch1 for 0.60 < ch1/ch0 0.72 lux = 0.00573 ch0 ? 0.00750 ch1 for 0.72 < ch1/ch0 0.85 lux = 0.00216 ch0 ? 0.00254 ch1 for ch1/ch0 > 0.85 lux = 0 the formulas shown above were obtained by optical testing with fluorescent and incandescent light sources, and apply only to open-air applications. optical apertures (e.g. light pipes) will affect the incident light on the device. simplified lux calculation below is the argument and return value including source code (shown on following page) for calculating lux. the source code is intended for embedded and/or microcontroller applications. two individual code sets are provided, one for the chipscale package and one for the tmb package. all floating point arithmetic operations have been eliminated since embedded controllers and microcontrollers generally do not support these types of operations. since floating point has been removed, scaling must be performed prior to calculating illuminance if the integration time is not 402 ms and/or if the gain is not 16 as denoted in the source code on the following pages. this sequence scales first to mitigate rounding errors induced by decimal math. extern unsigned int calculatelux(unsigned int igain, unsigned int tint, unsigned int ch0, unsigned int ch1, int itype) ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 22 copyright 2008, taos inc. the lumenology company www.taosinc.com //**************************************************************************** // // copyright 2004?2008 taos, inc. // // this code and information is provided ?as is? without warranty of any // kind, either expressed or implied, including but not limited to the // implied warranties of merchantability and/or fitness for a particular // purpose. // // module name: // lux.cpp // //**************************************************************************** #define lux_scale 16 // scale by 2^16 #define ratio_scale 9 // scale ratio by 2^9 //??????????????????????????????????????????????????? // integration time scaling factors //??????????????????????????????????????????????????? #define ch_scale 10 // scale channel values by 2^10 #define chscale_tint0 0x7517 // 322/11 * 2^ch_scale #define chscale_tint1 0x0fe7 // 322/81 * 2^ch_scale //??????????????????????????????????????????????????? // t package coefficients //??????????????????????????????????????????????????? // for ch1/ch0=0.00 to 0.35: // lux=0.00763*ch0?0.01031*ch1 // // for ch1/ch0=0.35 to 0.50: // lux=0.00817*ch0?0.01188*ch1 // // for ch1/ch0=0.50 to 0.60: // lux=0.00723*ch0?0.01000*ch1 // // for ch1/ch0=0.60 to 0.72: // lux=0.00573*ch0?0.00750*ch1 // // for ch1/ch0=0.72 to 0.85: // lux=0.00216*ch0?0.00254*ch1 // // for ch1/ch0>0.85: // lux/ch0=0 // //?????????????????????????????????????????????????? #define k1t 0x00b3 // 0.35 * 2^ratio_scale #define b1t 0x01f4 // 0.00763 * 2^lux_scale #define m1t 0x02a4 // 0.01031 * 2^lux_scale #define k2t 0x0100 // 0.50 * 2^ratio_scale #define b2t 0x0217 // 0.00817 * 2^lux_scale #define m2t 0x030a // 0.01188 * 2^lux_scale #define k3t 0x0133 // 0.60 * 2^ratio_scale #define b3t 0x01da // 0.00723 * 2^lux_scale #define m3t 0x028f // 0.01000 * 2^lux_scale ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 23 the lumenology company copyright 2008, taos inc. www.taosinc.com #define k4t 0x0171 // 0.72 * 2^ratio_scale #define b4t 0x0177 // 0.00573 * 2^lux_scale #define m4t 0x01ec // 0.00750 * 2^lux_scale #define k5t 0x01b3 // 0.85 * 2^ratio_scale #define b5t 0x008d // 0.00216 * 2^lux_scale #define m5t 0x00a6 // 0.00254 * 2^lux_scale #define k6t 0x01b3 // 0.85 * 2^ratio_scale #define b6t 0x0000 // 0.00000 * 2^lux_scale #define m6t 0x0000 // 0.00000 * 2^lux_scale //??????????????????????????????????????????????????? // cs package coefficients //??????????????????????????????????????????????????? // for ch1/ch0=0.00 to 0.35: // lux=0.00713*ch0?0.00975*ch1 // // for ch1/ch0=0.35 to 0.45: // lux=0.00813*ch0?0.01250*ch1 // // for ch1/ch0=0.45 to 0.52: // lux=0.00935*ch0?0.01521*ch1 // // for ch1/ch0=0.52 to 0.67: // lux=0.00394*ch0?0.00482*ch1 // // for ch1/ch0=0.67 to 0.85: // lux=0.00337*ch0?0.00396*ch1 // // for ch1/ch0>0.85: // lux/ch0=0 // //????????????????????????????????????????????????? #define k1c 0x00b3 // 0.35 * 2^ratio_scale #define b1c 0x01d3 // 0.00713 * 2^lux_scale #define m1c 0x027f // 0.00975 * 2^lux_scale #define k2c 0x00e6 // 0.45 * 2^ratio_scale #define b2c 0x0214 // 0.00813 * 2^lux_scale #define m2c 0x0333 // 0.01250 * 2^lux_scale #define k3c 0x010a // 0.52 * 2^ratio_scale #define b3c 0x0265 // 0.00935 * 2^lux_scale #define m3c 0x03e5 // 0.01521 * 2^lux_scale #define k4c 0x0157 // 0.67 * 2^ratio_scale #define b4c 0x0102 // 0.00394 * 2^lux_scale #define m4c 0x013c // 0.00482 * 2^lux_scale #define k5c 0x01b3 // 0.85 * 2^ratio_scale #define b5c 0x00dd // 0.00337 * 2^lux_scale #define m5c 0x0104 // 0.00396 * 2^lux_scale #define k6c 0x01b3 // 0.85 * 2^ratio_scale #define b6c 0x0000 // 0.00000 * 2^lux_scale #define m6c 0x0000 // 0.00000 * 2^lux_scale ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 24 copyright 2008, taos inc. the lumenology company www.taosinc.com // lux equation approximation without floating point calculations ////////////////////////////////////////////////////////////////////////////// // routine: unsigned int calculatelux(unsigned int ch0, unsigned int ch0, int itype) // // description: calculate the approximate illuminance (lux) given the raw // channel values of the tsl2568. the equation if implemented // as a piece?wise linear approximation. // // arguments: unsigned int igain ? gain, where 0:1x, 1:16x // unsigned int tint ? integration time, where 0:13.7ms, 1:100ms, 2:402ms, // 3:manual // unsigned int ch0 ? raw channel value from channel 0 of tsl2568 // unsigned int ch1 ? raw channel value from channel 1 of tsl2568 // unsigned int itype ? package type (0:t, 1:cs) // // return: unsigned int ? the approximate illuminance (lux) // ////////////////////////////////////////////////////////////////////////////// unsigned int calculatelux(unsigned int igain, unsigned int tint, unsigned int ch0, unsigned int ch1, int itype) { //???????????????????????????????????????????????????????????????????????? // first, scale the channel values depending on the gain and integration time // 16x, 402ms is nominal. // scale if integration time is not 402 msec unsigned long chscale; unsigned long channel1; unsigned long channel0; switch (tint) { case 0: // 13.7 msec chscale = chscale_tint0; break; case 1: // 101 msec chscale = chscale_tint1; break; default: // assume no scaling chscale = (1 << ch_scale); break; } // scale if gain is not 16x if (!igain) chscale = chscale << 4; // scale 1x to 16x // scale the channel values channel0 = (ch0 * chscale) >> ch_scale; channel1 = (ch1 * chscale) >> ch_scale; //????????????????????????????????????????????????????????????????? // find the ratio of the channel values (channel1/channel0) // protect against divide by zero unsigned long ratio1 = 0; if (channel0 != 0) ratio1 = (channel1 << (ratio_scale+1)) / channel0; // round the ratio value unsigned long ratio = (ratio1 + 1) >> 1; // is ratio <= eachbreak ? unsigned int b, m; ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 25 the lumenology company copyright 2008, taos inc. www.taosinc.com switch (itype) { case 0: // t package if ((ratio >= 0) && (ratio <= k1t)) {b=b1t; m=m1t;} else if (ratio <= k2t) {b=b2t; m=m2t;} else if (ratio <= k3t) {b=b3t; m=m3t;} else if (ratio <= k4t) {b=b4t; m=m4t;} else if (ratio <= k5t) {b=b5t; m=m5t;} else if (ratio > k6t) {b=b6t; m=m6t;} break; case 1: // cs package if ((ratio >= 0) && (ratio <= k1c)) {b=b1c; m=m1c;} else if (ratio <= k2c) {b=b2c; m=m2c;} else if (ratio <= k3c) {b=b3c; m=m3c;} else if (ratio <= k4c) {b=b4c; m=m4c;} else if (ratio <= k5c) {b=b5c; m=m5c;} else if (ratio > k6c) {b=b6c; m=m6c;} break; } unsigned long temp; unsigned long lux; temp = ((channel0 * b) ? (channel1 * m)); // scale cs or t package // round lsb (2^(lux_scale?1)) temp += (1 << (lux_scale?1)); // strip off fractional portion lux = temp >> lux_scale; return(lux); } ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 26 copyright 2008, taos inc. the lumenology company www.taosinc.com application information: hardware power supply decoupling and application hardware circuit the power supply lines must be decoupled with a 0.1 f capacitor placed as close to the device package as possible (figure 16). the bypass capacitor should have low effective series resistance (esr) and low ef fective series inductance (esi), such as the common ceramic types, which provide a low impedance path to ground at high frequencies to handle transient currents caused by internal logic switching. tsl2568/ TSL2569 v bus v dd 0.1 f r p r p scl sda r pi int figure 16. bus pull-up resistors pull-up resistors (rp) maintain the sdah and sclh lines at a high level when the bus is free and ensure the signals are pulled up from a low to a high level within the required rise time. for a complete description of the smbus maximum and minimum rp values, please review the smbus specification at http://www.smbus.org/specs. for a complete description of i 2 c maximum and minimum rp values, please review the i 2 c specification at http://www.semiconductors.philips.com. a pull-up resistor (r pi ) is also required for the interrupt (int), which functions as a wired-and signal in a similar fashion to the scl and sda lines. a typical impedance value between 10 k and 100 k can be used. please note that while figure 16 shows int being pulled up to v dd , the interrupt can optionally be pulled up to v bus . ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 27 the lumenology company copyright 2008, taos inc. www.taosinc.com application information: hardware pcb pad layout suggested pcb pad layout guidelines for the tmb-6 surface mount package and cs chipscale package are shown in figure 17 and figure 18. 0.70 0.90 3.80 2.60 0.70 0.70 0.90 0.25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. figure 17. suggested tmb-6 package pcb layout 0.50 6 0.21 0.50 0.50 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. figure 18. suggested chipscale package pcb layout ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 28 copyright 2008, taos inc. the lumenology company www.taosinc.com mechanical data package cs six-lead chipscale device 171 1398 465 203 1250 6 100 400 50 700 55 typ 30 500 500 375 30 500 375 30 1750 top view side view bottom view end view 6 210 30 1 2 3 6 5 4 pin out bottom view lead free pb notes: a. all linear dimensions are in micrometers. dimension tolerance is 25 m unless otherwise noted. b. solder bumps are formed of sn (96.5%), ag (3%), and cu (0.5%). c. the top of the photodiode active area is 410 m below the top surface of the package. d. the layer above the photodiode is glass and epoxy with an index of refraction of 1.53. e. this drawing is subject to change without notice. figure 19. package cs ? six-lead chipscale packaging configuration ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 29 the lumenology company copyright 2008, taos inc. www.taosinc.com mechanical data package tmb-6 six-lead surface mount device pin 1 0.31 1.90 2.60 3.80 1.35 0.90 typ 0.90 typ 0.30 typ 0.60 typ 0.30 typ t op view bottom view end view r 0.20 6 pls pin 4 lead free pb photo-active area top view 0.50 0.88 0.0745 typ 1.30 0.694 typ c l c l notes: a. all linear dimensions are in millimeters. dimension tolerance is 0.20 mm unless otherwise noted. b. the photo-active area is 1388 m by 149 m. c. package top surface is molded with an electrically nonconductive clear plastic compound having an index of refraction of 1.55 . d. contact finish is 0.5 m minimum of soft gold plated over a 18 m thick copper foil pattern with a 5 m to 9 m nickel barrier. e. the underside of the package includes copper traces used to connect the pads during package substrate fabrication. accordingly, exposed traces and vias should not be placed under the footprint of the tmb package in a pcb layout. f. this package contains no lead (pb). g. this drawing is subject to change without notice. figure 20. package t ? six-lead tmb plastic surface mount packaging configuration ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 30 copyright 2008, taos inc. the lumenology company www.taosinc.com mechanical data top view detail b detail a 1.35 0.05 a o 1.85 0.05 b o 0.97 0.05 k o 0.250 0.02 5 max 5 max 4.00 8.00 3.50 0.05 1.50 4.00 2.00 0.05 + 0.30 ? 0.10 1.75 b b aa 0.60 0.05 notes: a. all linear dimensions are in millimeters. dimension tolerance is 0.10 mm unless otherwise noted. b. the dimensions on this drawing are for illustrative purposes only. dimensions of an actual carrier may vary slightly. c. symbols on drawing a o , b o , and k o are defined in ansi eia standard 481?b 2001. d. each reel is 178 millimeters in diameter and contains 3500 parts. e. taos packaging tape and reel conform to the requirements of eia standard 481?b. f. in accordance with eia standard, device pin 1 is located next to the sprocket holes in the tape. g. this drawing is subject to change without notice. figure 21. tsl2568/TSL2569 chipscale carrier tape ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 31 the lumenology company copyright 2008, taos inc. www.taosinc.com mechanical data 0.30 0.050 2.10 4 0.100 2 0.100 8 typ 1.75 0.100 5.50 0.100 aa b b 12 0.100 r 0.20 typ 1.50 1.50 side view top view end view 3.09 max 2.90 0.100 a o r 0.20 typ 1.80 k o 4.29 max 4.10 0.100 b o detail b detail a r 0.20 typ notes: a. all linear dimensions are in millimeters. b. the dimensions on this drawing are for illustrative purposes only. dimensions of an actual carrier may vary slightly. c. symbols on drawing a o , b o , and k o are defined in ansi eia standard 481?b 2001. d. each reel is 178 millimeters in diameter and contains 1000 parts. e. taos packaging tape and reel conform to the requirements of eia standard 481?b. f. in accordance with eia standard, device pin 1 is located next to the sprocket holes in the tape. g. this drawing is subject to change without notice. figure 22. tsl2568/TSL2569 tmb carrier tape ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 32 copyright 2008, taos inc. the lumenology company www.taosinc.com manufacturing information the cs and t packages have been tested and have demonstrated an ability to be reflow soldered to a pcb substrate. the process, equipment, and materials used in these test are detailed below. the solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a pcb. temperature is measured on top of component. the components should be limited to a maximum of three passes through this solder reflow profile. table 13. tsl2568/69 solder reflow profile parameter reference tsl2568/69 average temperature gradient in preheating 2.5 c/sec soak time t soak 2 to 3 minutes time above 217 c t 1 max 60 sec time above 230 c t 2 max 50 sec time above t peak ?10 c t 3 max 10 sec peak temperature in reflow t peak 260 c (?0 c/+5 c) temperature gradient in cooling max ?5 c/sec t 3 t 2 t 1 t soak t 3 t 2 t 1 t peak not to scale ? for reference only time (sec) temperature ( c) figure 23. tsl2568/TSL2569 solder reflow profile graph ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 33 the lumenology company copyright 2008, taos inc. www.taosinc.com manufacturing information tooling required chipscale ? solder stencil (square aperture size 0.210 mm, stencil thickness of 152 m) tmb ? solder stencil (aperture size 0.70 mm x 0.90 mm, stencil thickness of 152 m) process 1. apply solder paste using stencil 2. place component 3. reflow solder/cure 4. x-ray verify (recommended for chipscale only) additional notes for chipscale placement of the tsl2568/TSL2569 chipscale device onto the gold immersion substrate is accomplished using a standard surface mount manufacturing process. using a 152- m stencil with a 0.21 mm square aperture, print solder paste onto the substrate. machine-place the tsl2568/TSL2569 from the tape onto the substrate. a suggest pick-up tool is the siemens vacuum pickup tool nozzle number 912. this nozzle has a rubber tip with a diameter of approximately 0.75 mm. the part is picked up from the center of the body. it is important to use a substrate that has an immersion plating surface. this may be immersion gold, solder, or white tin. hot air solder leveled (hasl) substrates are not coplanar, making them difficult to work with. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 34 copyright 2008, taos inc. the lumenology company www.taosinc.com manufacturing information moisture sensitivity optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package molding compound. to ensure the package molding compound contains the smallest amount of absorbed moisture possible, each device is dry-baked prior to being packed for shipping. devices are packed in a sealed aluminized envelope with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. the cs package has been assigned a moisture sensitivity level of msl 2 and the devices should be stored under the following conditions: temperature range 5 c to 50 c relative humidity 60% maximum floor life 1 year out of bag at ambient < 30 c / 60% rh rebaking w ill be required if the aluminized envelope ha s been open for more than 1 year. if rebaking is required, it should be done at 90 c for 3 hours. the t package has been assigned a moisture sensitivity level of msl 3 and the devices should be stored under the following conditions: temperature range 5 c to 50 c relative humidity 60% maximum total time 6 months from the date code on the aluminized envelope ? if unopened opened time 168 hours or fewer rebaking will be required if the devices have been stored unopened for more than 6 months or if the aluminized envelope has been open for more than 168 hours. if rebaking is required, it should be done at 90 c for 4 hours. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 35 the lumenology company copyright 2008, taos inc. www.taosinc.com production data ? information in this document is current at publication date. products conform to specifications in accordance with the terms of texas advanced optoelectronic solutions, inc. standard warranty. production processing does not necessarily include testing of all parameters. lead-free (pb-free) and green statement pb-free (rohs) taos? terms lead-free or pb-free mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, taos pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br) taos defines green to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material). important information and disclaimer the information provided in this statement represents taos? knowledge and belief as of the date that it is provided. taos bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. taos has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. taos and taos suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. notice texas advanced optoelectronic solutions, inc. (t aos) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. customers are advised to contact taos to obtain the latest product information before placing orders or designing taos products into systems. taos assumes no responsibility for the use of any products or circuits described in this document or customer product design, co nveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. taos further makes no claim as to the suitability of its products for any particu lar purpose, nor does taos assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. texas advanced optoelectronic solutions, inc. products are not designed or intended for use in critical applications in which the failure or malfunction of the taos product may result in personal injury or death. use of taos products in life support systems is expressly unauthorized and any such use by a customer is completely at the customer?s risk. lumenology, taos, the taos logo, and texas advanced optoelectronic solutions are registered trademarks of texas advanced optoelectronic solutions incorporated. ams ag technical content still valid
tsl2568, TSL2569 light-to-digital converter taos091d ? december 2008 36 copyright 2008, taos inc. the lumenology company www.taosinc.com ams ag technical content still valid

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